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Revision 1.11
26 - 32
AS5013
Datasheet - I睠 Registers
Hall Bias Currents
AGC
8
RW
2Ah
00b
20h
<7:6>
<5:0>
Not implemented (read 00b)
6 bit AGC value (if an AGC algorithm implemented in
the 礐)
Control Register for the Algorithm
M_ctrl
8
R/W
2Bh
00h
<7:0>
Control register for the middle Hall element C5. If the
register is zero the middle Hall element is not used for
the XY calculation
J_ctrl
8
R/W
2Ch
06h
<7:0>
Control register for the sector dependent attenuation
of the outer Hall elements
T_ctrl
8
R/W
2Dh
09h
<7:0>   Scale input to fit to the 8 Bit result register
Control_register_2
Test
1
R/W
2Eh
1b
<7>
Test only, must be 1
Test
1
R/W
2Eh
0b
<6>    Test only, must be 0
Test
1
R/W
2Eh
0b
<5>    Test only, must be 0
ext_clk_en
1
R/W
2Eh
0b
<4>
Test only, must be 0
use_static_offset
1
R/W
2Eh
0b
<3>    Test only, must be 0
EN_offset_comp
1
R/W
2Eh
1b
<2>    Test only, must be 1
inv_spinning
1
R/W
2Eh
0b
<1>
Invert the channel voltage. Set to invert the magnet
polarity
pptrim_en
1
R/W
2Eh
0b
<0>
Factory only, must be 0
Table 6. Registers
Register
Number
of bits
Access
Address
Format
Reset
Value
Bit
Description
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